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1?9 information storage devices, inc. 1 features easy-to-use single-chip voice record/ playback solution high-quality, natural voice/audio reproduction manual switch or microcontroller compati- ble playback can be edge- or level- activated single-chip durations of 32*, 40*, 48*, 64* , 60, 75, 90, and 120 seconds directly cascadable for longer durations automatic power-down (push-button mode) standby current 1 m a (typical) zero-power message storage eliminates battery backup circuits fully addressable to handle multiple messages 100-year message retention (typical) 100,000 record cycles (typical) on-chip clock source no algorithm development required single +5 volt power supply available in die form, dip, soic, and tsop packaging industrial temperature (-40 c to +85 c) versions available isd2500 series single-chip voice record/playback devices 32-*, 40-*, 48-*, 64-* , 60-, 75-, 90-, and 120-second durations isd2500 series summary part number duration (seconds) input sample rate (khz) typical filter pass band (khz) isd2560 60 8.0 3.4 isd2575 75 6.4 2.7 isd2590 90 5.3 2.3 isd25120 120 4.0 1.7 ISD2532* 32 8.0 3.4 isd2540* 40 6.4 2.7 isd2548* 48 5.3 2.3 isd2564* 64 4.0 1.7 * advance information: ISD2532/40/48/64 devices.
product data sheets isd2500 series 1?0 - 1 general description information storage devices' isd2500 chip- corder series provides high-quality, single-chip record/playback solutions for 32- to 120-second messaging applications. the cmos devices include an on-chip oscillator, microphone pream- plifier, automatic gain control, antialiasing filter, smoothing filter, speaker amplifier, and high den- sity multi-level storage array. in addition, the isd2500 is microcontroller compatible, allowing complex messaging and addressing to be achieved. recordings are stored in on-chip nonvolatile mem- ory cells, providing zero-power message storage. this unique, single-chip solution is made possible through isd's patented multilevel storage technol- ogy. voice and audio signals are stored directly into memory in their natural form, providing high- quality, solid-state voice reproduction. detailed description speech/sound quality the isd2500 series includes devices offered at 4.0, 5.3, 6.4, and 8.0 khz sampling frequencies, allowing the user a choice of speech quality options. increasing the duration within a product series decreases the sampling frequency and bandwidth, which affects sound quality. please refer to the isd2500 series summary table on page 1-79 to compare filter pass band and product durations. the speech samples are stored directly into on- chip nonvolatile memory without the digitization and compression associated with other solutions. direct analog storage provides a very true, natural sounding reproduction of voice, music, tones, and sound effects not available with most solid-state digital solutions. duration to meet end system requirements, the isd2500 series offers single-chip solutions at 32*, 40*, 48*, 64 *, 60, 75, 90, and 120 seconds. parts may also be cascaded together for longer durations. isd2560/75/90/120 device block diagram * advance information: ISD2532/40/48/64 devices. amp pre- amp v cca v ccd a0 a2 a3 a4 a5 a7 a8 a9 a6 ovf p/r ce eom pd xclk ana in ana out mic mic ref agc decoders 480 k cell nonvolatile multilevel storage array amp aux in sp+ sp v ssa v ssd a1 timing internal clock power conditioning address buffers device control analog transceivers sampling clock mux automatic gain control (agc) 5-pole active antialiasing filter 5-pole active smoothing filter r
product data sheets isd2500 series 1?1 1 eeprom storage one of the benefits of isd? chipcorder technol- ogy is the use of on-chip nonvolatile memory, providing zero-power message storage. the mes- sage is retained for up to 100 years typically without power. in addition, the device can be re- recorded typically over 100,000 times. microcontroller interface in addition to its simplicity and ease of use, the isd2500 series includes all the interfaces neces- sary for microcontroller-driven applications. the address and control lines can be interfaced to a microcontroller and manipulated to perform a vari- ety of tasks, including message assembly, message concatenation, predefined fixed mes- sage segmentation, and message management. programming the isd2500 series is also ideal for playback-only applications, where single or multiple messages are referenced through buttons, switches, or a microcontroller. once the desired message config- uration is created, duplicates can easily be generated via an isd programmer. pin descriptions voltage inputs (v cca , v ccd ) to minimize noise, the analog and digital circuits in the isd2500 series devices use separate power busses. these voltage busses are brought out to separate pins and should be tied together as close to the supply as possible. in addition, these sup- plies should be decoupled as close to the package as possible. ground inputs (v ssa , v ssd ) the isd2500 series of devices utilizes separate analog and digital ground busses. these pins should be connected separately through a low- impedance path to power supply ground. power down input (pd) when not recording or playing back, the pd pin should be pulled high to place the part in a very low power mode (see i sb specification). when o vf pulses low for an overflow condition, pd should be brought high to reset the address pointer back to the beginning of the record/play- back space. the pd pin has additional functionality in the m6 (push-button) operational ISD2532/40/48/64 * device block diagram * advance information: ISD2532/40/48/64 devices. amp pre- amp v cca v ccd a0 a2 a3 a4 a5 a7 a8 a6 ovf p/r ce eom pd xclk ana in ana out mic mic ref agc decoders 256 k cell nonvolatile multilevel storage array amp aux in sp+ sp v ssa v ssd a1 timing internal clock power conditioning address buffers device control analog transceivers sampling clock mux automatic gain control (agc) 5-pole active antialiasing filter 5-pole active smoothing filter r
product data sheets isd2500 series 1?2 - 1 ssd ssa ovf ce pd eom xclk p/r v nc nc a0/m0 a1/m1 a2/m2 a3/m3 a4/m4 a5/m5 a6/m6 ana out ana in agc mic ref mic v sp? nc nc sp+ v v aux in a9 a8 a7 ccd cca isd2560/75/90/120 tsop 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 ssd ssa a0/m0 a1/m1 a2/m2 a3/m3 a4/m4 a5/m5 a6/m6 a7 a8 a9 aux in v v sp+ v p/r xclk eom pd ce ovf ana out ana in agc mic ref mic v sp? ccd cca isd2560 isd2575 isd2590 isd25120 dip/soic 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 mode described later in the operational mode section. chip enable input (ce ) the ce pin is taken low to enable all playback and record operations. the address inputs and playback/record input (p/r ) are latched by the falling edge of ce . ce has additional functionality in the m6 (push-button) operational mode described later in the operational mode section. playback/record input (p/r ) the p/r input is latched by the falling edge of the ce pin. a high level selects a playback cycle while a low level selects a record cycle. for a record cycle, the address inputs provide the start- ing address and recording continues until pd or ce is pulled high or an overflow is detected (i.e. the chip is full). when a record cycle is terminated by pulling pd or ce high, an end-of-message (eom) marker is stored at the current address in memory. for a playback cycle, the address inputs provide the starting address and the device will play until an eom marker is encountered. the device can continue past an eom marker in an operational mode, or if ce is held low in address mode. (see page 1-85 for more operational modes). end-of-message / run output (eom) a nonvolatile marker is automatically inserted at the end of each recorded message. it remains there until the message is recorded over. the eom output pulses low for a period of t eom at the end of each message. in addition, the isd2500 series has an internal v cc detect circuit to maintain message integrity should v cc fall below 3.5v. in this case, eom goes low and the device is fixed in playback-only mode. when the device is configured in operational mode m6 (push-button mode), this pin provides an active-high run signal, indicating the device is currently recording or playing. this signal can con- veniently drive an led for a visual indicator of a record or playback operation in process. over?w output (ovf ) this signal pulses low at the end of memory space, indicating the device has been filled and the message has overflowed. the o vf output then fol- lows the ce input until a pd pulse has reset the device. this pin can be used to cascade several isd2500 devices together to increase record/ playback durations. isd2560/75/90/120 device pinouts * advance information: ISD2532/40/48/64 devices.
product data sheets isd2500 series 1?3 1 ssd ssa ovf ce pd eom xclk p/r v nc nc a0/m0 a1/m1 a2/m2 a3/m3 a4/m4 a5/m5 a6/m6 ana out ana in agc mic ref mic v sp? nc nc sp+ v v aux in a8 a7 nc ccd cca ISD2532/40/48/64 tsop 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 ssd ssa a0/m0 a1/m1 a2/m2 a3/m3 a4/m4 a5/m5 a6/m6 nc a7 a8 aux in v v sp+ v p/r xclk eom pd ce ovf ana out ana in agc mic ref mic v sp? ccd cca ISD2532 isd2540 isd2548 isd2564 dip/soic 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 microphone input (mic) the microphone input transfers its signal to the on- chip preamplifier. an on-chip automatic gain con- trol (agc) circuit controls the gain of this preamplifier from -15 to 24 db. an external micro- phone should be ac coupled to this pin via a series capacitor. the capacitor value, together with the internal 10 k ohm resistance on this pin, deter- mines the low-frequency cutoff for the isd2500 series passband. see isd's application notes and design manual in this book for additional informa- tion on low-frequency cutoff calculation. microphone reference input (mic ref) the mic ref input is the inverting input to the microphone preamplifier. this provides a noise- canceling or common-mode rejection input to the device when connected to a differential microphone. automatic gain control input (agc) the agc dynamically adjusts the gain of the preamplifier to compensate for the wide range of microphone input levels. the agc allows the full range of whispers to loud sounds to be recorded with minimal distortion. the ?ttack?time is deter- mined by the time constant of a 5 k w internal resistance and an external capacitor (c2 on the schematic on page 1-100) connected from the agc pin to v ssa analog ground. the ?elease time is determined by the time constant of an external resistor (r2) and an external capacitor (c2) connected in parallel between the agc pin and v ssa analog ground. nominal values of 470 k w and 4.7 m f give satisfactory results in most cases. analog output (ana out) this pin provides the preamplifier output to the user. the voltage gain of the preamplifier is deter- mined by the voltage level at the agc pin. analog input (ana in) the analog input pin transfers its signal to the chip for recording. for microphone inputs, the ana out pin should be connected via an external capacitor to the ana in pin. this capacitor value, together with the 3.0 k w input impedance of ana in, is selected to give additional cutoff at the low- frequency end of the voice passband. if the desired input is derived from a source other than a microphone, the signal can be fed, capacitively coupled, into the ana in pin directly. external clock input (xclk) the external clock input for the isd2500 devices has an internal pull-down device. these devices are configured at the factory with an internal sam- pling clock frequency centered to 1% of ISD2532/40/48/64 * device pinouts * advance information: ISD2532/40/48/64 devices.
1?4 product data sheets isd2500 series - 1 specification. the frequency is then maintained to a variation of 2.25% over the entire commercial temperature and operating voltage ranges. the internal clock has a 5% tolerance over the indus- trial temperature and voltage range. a regulated power supply is recommended for industrial tem- perature range parts. if greater precision is required, the device can be clocked through the xclk pin as follows: these recommended clock rates should not be varied because the antialiasing and smoothing fil- ters are fixed, and aliasing problems can occur if the sample rate differs from the one recom- mended. the duty cycle on the input clock is not critical, as the clock is immediately divided by two. if the xclk is not used , this input must be con- nected to ground . speaker outputs (sp+/sp-) all devices in the isd2500 series include an on- chip differential speaker driver, capable of driving 50 milliwatts into 16 w from aux in (12.2 mw from memory). the speaker outputs are held at v ssa levels during record and power down. it is therefore not possible to parallel speaker outputs of multiple isd2500 devices or the outputs of other speaker drivers. note connection of speaker outputs in parallel may cause damage to the device. a single output may be used alone (including a coupling capacitor between the sp pin and the speaker). these outputs may be used individually with the output signal taken from either pin. using the differential outputs results in a 4:1 improve- ment in output power. note never ground or drive an unused speaker output. auxiliary input (aux in) the auxiliary input is multiplexed through to the output amplifier and speaker output pins when ce is high, p/r is high, and playback is currently not active or if the device is in playback overflow. when cascading multiple isd2500 devices, the aux in pin is used to connect a playback signal from a following device to the previous output speaker drivers. for noise considerations, it is sug- gested that the auxiliary input not be driven when the storage array is active. address/mode inputs (ax/mx) the address/mode inputs have two functions depending on the level of the two most significant bits (msb) of the address (a8 and a9 for the isd256075/90/120 devices, and a7 and a8 for the ISD2532/40/48/64* devices). if either or both of the two msbs are low, the inputs are all interpreted as address bits and are used as the start address for the current record or playback cycle. the address pins are inputs only and do not output internal address information as the operation progresses. address inputs are latched by the falling edge of ce . if both msbs are high, the address/mode inputs are interpreted as mode bits according to the operational mode table on page 1-85. there are six operational modes (m0..m6) available as indi- part number sample rate required clock isd2560 8.0 khz 1024 khz isd2575 6.4 khz 819.2 khz isd2590 5.3 khz 682.7 khz isd25120 4.0 khz 512 khz ISD2532* 8.0 khz 1024 khz isd2540* 6.4 khz 819.2 khz isd2548* 5.3 khz 682.7 khz isd2564* 4.0 khz 512 khz * advance information: ISD2532/40/48/64 devices.
product data sheets isd2500 series 1?5 1 cated in the table. it is possible to use multiple operational modes simultaneously. operational modes are sampled on each falling edge of ce , and thus operational modes and direct addressing are mutually exclusive. operational modes the isd2500 series is designed with several built- in operational modes that provide maximum func- tionality with minimum additional components. these are described in detail below. the opera- tional modes use the address pins on the isd2500 devices, but are mapped outside the valid address range. when the two most significant bits (msbs) are high (a8 and a9 for the isd2560/75/90/120 devices, and a7 and a8 for the ISD2532/40/48/64* devices), the remaining address signals are inter- preted as mode bits and not as address bits. therefore, operational modes and direct address- ing are not compatible and cannot be used simultaneously. there are two important considerations for using operational modes. first, all operations begin ini- tially at address 0, which is the beginning of the isd2500 address space. later operations can begin at other address locations, depending on the operational mode(s) chosen. in addition, the address pointer is reset to 0 when the device is changed from record to playback, playback to record (except m6 mode), or when a power-down cycle is executed. second, operational modes are executed when ce goes low and the two msbs are high. this operational mode remains in effect until the next low-going ce signal, at which point the current address/mode levels are sampled and executed. operational modes description the operational modes can be used in conjunction with a microcontroller, or they can be hard-wired to provide the desired system operation. m0 ?message cueing message cueing allows the user to skip through messages, without knowing the actual physical addresses of each message. each ce low pulse causes the internal address pointer to skip to the next message. this mode should be used for note: an asterisk (*) indicates additional operational modes which can be used simultaneously with the given mode. mode control function typical use jointly compatible* m0 message cueing fast-forward through messages m4, m5, m6 m1 delete eom markers position eom marker at the end of the last message m3, m4, m5, m6 m2 not applicable reserved n/a m3 looping continuous playback from address 0 m1, m5, m6 m4 consecutive address- ing record/play multiple consecutive messages m0, m1, m5 m5 ce level-activated allows message pausing m0, m1, m3, m4 m6 push-button control simpli?d device interface m0, m1, m3 operational modes table * advance information: ISD2532/40/48/64 devices.
product data sheets isd2500 series 1?6 - 1 playback only, and is typically used with the m4 operational mode. m1 ?delete eom markers the m1 operational mode allows sequentially recorded messages to be combined into a single message with only one eom marker set at the end of the final message. when this operational mode is configured, messages recorded sequentially are played back as one continuous message. m2 ?unused when operational modes are selected, the m2 pin should be low. m3 ?message looping the m3 operational mode allows for the auto- matic, continuously repeated playback of the message located at the beginning of the address space. a message can completely fill the isd2500 device and will loop from beginning to end without o vf going low. m4 ?consecutive addressing during normal operations, the address pointer will reset when a message is played through to an eom marker. the m4 operational mode inhibits the address pointer reset on eom , allowing mes- sages to be played back consecutively. m5 ?ce -level activated the default mode for isd2500 devices is for ce to be edge-activated on playback and level-activated on record. the m5 operational mode causes the ce pin to be interpreted as level-activated as opposed to edge-activated during playback. this is specifically useful for terminating playback oper- ations using the ce signal. in this mode, ce low begins a playback cycle, at the beginning of the device memory. the playback cycle continues as long as ce is held low. when ce goes high, playback will immediately end. a new ce low will restart the message from the beginning unless m4 is also high. m6 ?push-button mode the isd2500 series of devices contain a push- button operational mode. the push-button mode is used primarily in very low-cost applications and is designed to minimize external circuitry and com- ponents, thereby reducing system cost. in order to configure the device in push-button operational mode, the two most significant address bits must be high, and the m6 mode pin must also be high. a device in this mode always powers down at the end of each playback or record cycle after ce goes high. when this operational mode is implemented, sev- eral of the pins on the device have alternate functionality: ce pin (start/pause) in push-button operational mode, ce acts as a low-going pulse-activated start/pause sig- nal. if no operation is currently in progress, a low- going pulse on this signal will initiate a playback or a record cycle according to the level on the p/r pin. a subsequent pulse on the ce pin, before an end-of-message is reached in playback or an overflow condition occurs, will cause the device to pause. the address counter is not reset, and another ce pulse will cause the device to continue the operation from the place where it was paused. pd pin (stop/reset) in push-button operational mode, pd acts as a high-going pulse-activated stop/reset signal. when a playback or record cycle is in progress and a high-going pulse is observed on pd, the pin name alternate functionality in push-button mode ce start/pause push-button (low pulse-activated) pd stop/reset push-button (high pulse activated) eom active-high run indicator * advance information: ISD2532/40/48/64 devices.
product data sheets isd2500 series 1?7 1 current cycle is terminated and the address pointer is reset to address 0, the beginning of the message space. eom pin (run) in push-button operational mode, eom becomes an active-high run signal which can be used to drive an led or other external device. it is high whenever a record or playback operation is in progress. recording in push-button mode 1. the pd pin should be low, usually using a pulldown resistor. 2. the p/r pin is taken low. 3. the ce pin is pulsed low. recording starts, eom goes high to indicate an oper- ation in progress. 4. the ce pin is pulsed low. recording pauses, eom goes back low. the internal address pointers are not cleared, but an eom marker is stored in memory to point to the message end. the p/r pin may be taken high at this time. any subsequent ce would start a playback at address 0. 5. the ce pin is pulsed low. recording starts at the next address after the previous set eom marker. eom goes back high. note if the m1 operational mode pin is also high, the just previously written eom bit is erased, and recording starts at that address.) 6. when the recording sequences are fin- ished, the final ce pulse low will end the last record cycle, leaving a set eom marker at the message end. recording may also be terminated by a high level on pd, which will leave a set eom marker. playback in push-button mode 1. the pd pin should be low. 2. the p/r pin is taken high. 3. the ce pin is pulsed low. playback starts, eom goes high to indicate an operation in progress. 4. if the ce pin is pulsed low or an eom marker is encountered during an operation, the part will pause. the internal address pointers are not cleared, and eom goes back low. the p/r pin may be changed at this time. a subsequent record operation would not reset the address pointers and the recording would begin where playback ended. 5. ce is again pulsed low. playback starts where it left off, with eom going high to indicate an operation in progress. 6. playback continues as in steps 4 and 5 until pd is pulsed high or overflow occurs. 7. if in overflow, pulling ce low will reset the address pointer and start playback from the beginning. after a pd pulse, the part is reset to address 0. note push-button mode can be used in con- junction with modes m0, m1, and m3. good audio design practices isd products are very high-quality single-chip voice recording and playback systems. to ensure the highest quality voice reproduction, it is impor- tant that good audio design practices on layout and power supply decoupling be followed. see the isd application notes and design manual in this book for details. * advance information: ISD2532/40/48/64 devices.
product data sheets isd2500 series 1?8 - 1 isd1000a compatibility the isd2500 series of devices is designed to pro- vide upward compatibility with the isd1000a family. when designing with the isd2500 series, the following differences should be noted. addressing the isd2560/75/90/120 devices have 480k stor- age cells designed to provide 60 seconds of storage at a sampling rate of 8.0 khz. this is approximately four times the storage of the isd1000a family. to enable the same addressing resolution, two additional address pins have been added. the address space of each device is divis- ible into 300 increments with valid addressing from 00 to 13f hex. some higher addresses are mapped into the operational modes. all other addresses are invalid. the ISD2532/40/48/64 devices have 256k storage cells designed to provide 32 seconds of storage at a sampling rate of 8.0 khz. this is twice the amount of storage of the isd1000a family. to enable the same addressing resolution, one addi- tional address pin has been added. the address space of each device is divisable into 320 incre- ments with valid addressing from 00 to 13f hex. over?w the isd1000a series combined two functions on the eom pin: end-of-message indication and over- flow. the isd2500 separates these two functions. pin 25 (pdip package) remains as eom , but out- puts only the eom signal indication. pin 22 (pdip package) becomes o vf and pulses low only when the device reaches its end of memory, or is ?ull.?this change allows easy message cueing and addressability across device boundaries. this also means that the m2 operational mode found in the isd1000a family is not implemented in the isd2500 series. push-button mode the isd2500 series includes an additional opera- tional mode called push-button mode. this provides an alternative interface to the record and playback functions of the part. the ce and pd pins become redefined as edge-activated ?ush- buttons.? a pulse on ce initiates a cycle, and if triggered again, pauses the current cycle without resetting the address pointer (i.e., a start or pause function). pd stops any current cycle and resets the address pointer to the beginning of the mes- sage space (i.e., a stop and reset function). additionally, the eom pin functions as an active- high run indicator, and can be used to drive an led indicating a record or playback operation is in progress. devices in the push-button mode can- not be cascaded. looping mode the isd2500 series can loop with a message that completely fills the memory space. note additional descriptions of isd2500 device functionality and application examples are provided in the isd application notes and design manual in this book. * advance information: ISD2532/40/48/64 devices.
product data sheets isd2500 series 1?9 1 a0-a9 ce mic ana in t ce t pdh t pds t pdr t set t hold ovf pd t pud don't care don't care don't care don't care t set p/r t ovf playback a0-a9 ce t ce t set t hold pd sp+/ ovf eom t pud t eom don't care don't care don't care don't care t set p/r t pdh t pds t pdp t ovf timing diagrams record * advance information: ISD2532/40/48/64 devices.
1?0 product data sheets isd2500 series - 1 absolute maximum ratings (packaged parts) note: stresses above those listed may cause permanent damage to the device. exposure to the absolute maximum ratings may affect device reliability. functional operation is not implied at these conditions. condition value junction temperature 150 c storage temperature range ?5 c to +150 c voltage applied to any pin (v ss ?0.3 v) to (v cc + 0.3 v) voltage applied to any pin (input current limited to 20 ma) (v ss ?1.0 v) to (v cc + 1.0 v) lead temperature (soldering ? 10 seconds) 300 c v cc - v ss ?0.3 v to + 7.0 v operating conditions (packaged parts) notes: 1. case temperature. 2. v cc = v cca = v ccd. 3. v ss = v ssa = v ssd . condition value commercial operating temperature range (1) 0 c to +70 c industrial operating temperature range (1) ?0 c to +85 c supply voltage (v cc ) (2) +4.5 v to +5.5 v ground voltage (v ss ) (3) 0 v dc parameters (packaged parts) symbol parameters min (2) typ (1) max (2) units conditions v il input low voltage 0.8 v v ih input high voltage 2.0 v v ol output low voltage 0.4 v i ol = 4.0 ma v oh output high voltage v cc ?.4 v i oh = ?10 m a v oh1 o vf output high voltage 2.4 v i oh = ?1.6 ma v oh2 eom output high voltage v cc ?.0 v cc ?.8 v i oh = ?3.2 ma i cc v cc current (operating) 25 30 ma r ext = (3) i sb v cc current (standby) 1 10 m a (3) i il input leakage current + 1 m a i ilpd input current high w/pull down 130 m a force v cc (4) r ext output load impedance 16 w speaker load r mic preamp in input resistance 4 9 15 k w mic and mic ref pins r aux aux input resistance 5 11 20 k w * advance information: ISD2532/40/48/64 devices.
1?1 product data sheets isd2500 series 1 notes: 1. typical values @ t a = 25 c and 5.0 v. 2. all min/max limits are guaranteed by isd via electrical testing or characterization. not all specifications are 100% tested. 3. v cca and v ccd connected together. 4. xclk pin only. ac parameters (packaged parts) r ana in ana in input resistance 2.3 3 5 k w a pre1 preamp gain 1 21 24 26 db agc = 0.0 v a pre2 preamp gain 2 ?5 5 db agc = 2.5 v a aux aux in/sp+ gain 0.98 1.0 v/v a arp ana in to sp+/- gain 21 23 26 db r agc agc output resistance 2.5 5 9.5 k w symbol characteristic min (2) typ (1) max (2) units conditions f s sampling ? ISD2532* frequency ? isd2540* ? isd2548* ? isd2564* ?isd2560 ?isd2575 ?isd2590 ?isd25120 8.0 6.4 5.3 4.0 8.0 6.4 5.3 4.0 khz khz khz khz khz khz khz khz (7) (7) (7) (7) (7) (7) (7) (7) f cf filter pass band ? ISD2532* ? isd2540* ? isd2548* ? isd2564* ?isd2560 ?isd2575 ?isd2590 ?isd25120 3.4 2.7 2.3 1.7 3.4 2.7 2.3 1.7 khz khz khz khz khz khz khz khz 3 db roll-off point (3) (8) 3 db roll-off point (3) (8) 3 db roll-off point (3) (8) 3 db roll-off point (3) (8) 3 db roll-off point (3) (8) 3 db roll-off point (3) (8) 3 db roll-off point (3) (8) 3 db roll-off point (3) (8) symbol parameters min (2) typ (1) max (2) units conditions dc parameters (packaged parts) ?continued * advance information: ISD2532/40/48/64 devices.
1?2 product data sheets isd2500 series - 1 t rec record ? ISD2532* duration ? isd2540* ? isd2548* ? isd2564* ?isd2560 ?isd2560 ?isd2575 ?isd2575 ?isd2590 ?isd25120 58.1 56.5 72.6 70.7 87.1 116.1 32.0 40.0 48.0 64.0 60.0 60.0 75.0 75.0 90.0 120.0 62.0 63.8 77.5 79.7 93.0 123.9 sec sec sec sec sec sec sec sec sec sec commercial operation industrial operation commercial operation industrial operation commercial operation commercial operation t play playback ? ISD2532* duration ? isd2540* ? isd2548* ? isd2564* ?isd2560 ?isd2560 ?isd2575 ?isd2575 ?isd2590 ?isd25120 58.1 56.5 72.6 70.7 87.1 116.1 32.0 40.0 48.0 64.0 60.0 60.0 75.0 75.0 90.0 120.0 62.0 63.8 77.5 79.7 93.0 123.9 sec sec sec sec sec sec sec sec sec sec (7) (7) (7) (7) commercial operation (7) industrial operation (7) commercial operation (7) industrial operation (7) commercial operation (7) commercial operation (7) t ce ce pulse width 100 nsec t set control/address setup time 300 nsec t hold control/address hold time 0 nsec t pud power-up delay ISD2532* ? isd2540* ? isd2548* ? isd2564* ?isd2560 ?isd2560 ?isd2575 ?isd2575 ?isd2590 ?isd25120 24.1 23.5 30.2 29.3 36.2 48.2 25.0 31.3 37.5 50.0 25.0 25.0 31.3 31.3 37.5 50.0 27.8 28.5 34.3 35.2 40.8 53.6 msec msec msec msec msec msec msec msec msec msec commercial operation industrial operation commercial operation industrial operation commercial operation commercial operation t pdr pd pulse ? ISD2532* width record ? isd2540* ? isd2548* ? isd2564* ?isd2560 ?isd2575 ?isd2590 ?isd25120 25 31.25 37.5 50.0 25 31.25 37.5 50.0 msec msec msec msec msec msec msec msec symbol characteristic min (2) typ (1) max (2) units conditions ac parameters (packaged parts) ?continued * advance information: ISD2532/40/48/64 devices.
1?3 product data sheets isd2500 series 1 notes: 1. typical values @ t a = 25 c and 5.0 v. 2. all min/max limits are guaranteed by isd via electrical testing or characterization. not all specifications are 100% tested. 3. low-frequency cutoff depends upon the value of external capacitors (see pin descriptions). 4. from aux in; if ana in is driven at 50 mv p-p, the p out =12.2 mw, typical. 5. with 5.1 k w series resistor at ana in. 6. t pds is required during a static condition, typically overflow. 7. sampling frequency and playback duration can vary as much as 2.25% over the commercial temperature range and voltage range and 5% over the industrial temperature and voltage range. for greater stability, an external clock can be utilized (see pin descriptions). 8. filter specification applies to the antialiasing filter and the smoothing filter. t pdp pd pulse ? ISD2532* width play isd2540* ? isd2548* ? isd2564* ?isd2560 ?isd2575 ?isd2590 ?isd25120 12.5 15.625 18.75 25.0 12.5 15.625 18.75 25.0 msec msec msec msec msec msec msec msec t pds pd pulse width static 100 nsec (6) t pdh power down hold 0 nsec t eom eom pulse width ? ISD2532* ? isd2540* ? isd2548* ? isd2564* ?isd2560 ?isd2575 ?isd2590 ?isd25120 12.5 15.625 18.75 25.0 12.5 15.625 18.75 25.0 msec msec msec msec msec msec msec msec t ovf over?w pulse width 6.5 m sec thd total harmonic distortion 1 2 % @ 1 khz p out speaker output power 12.2 50 mw r ext = 16 w (4) v out voltage across speaker pins 2.5 v p? r ext = 600 w v in1 mic input voltage 20 mv peak-to-peak (5) v in2 ana in input voltage 50 mv peak-to-peak v in3 aux input voltage 1.25 v peak-to-peak; r ext = 16 w symbol characteristic min (2) typ (1) max (2) units conditions ac parameters (packaged parts) ?continued * advance information: ISD2532/40/48/64 devices.
1?4 product data sheets isd2500 series - 1 typical parameter variation with voltage and temperature (packaged parts) -40 25 70 85 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 -40 1.2 1.0 0.8 0.6 0.4 0.2 0 -40 25 20 15 10 5 0 25 70 85 25 70 85 -40 25 70 85 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0 5.5 volts 4.5 volts operating current (ma) temperature (c) standby current ( m a) temperature (c) percent change (%) temperature (c) percent distortion (%) temperature (c) total harmonic distortion oscillator stability record mode operating current (i cc ) standby current (i sb ) * advance information: ISD2532/40/48/64 devices.
1?5 product data sheets isd2500 series 1 absolute maximum ratings (die) note: stresses above those listed may cause permanent damage to the device. exposure to the absolute maximum ratings may affect device reliability. functional operation is not implied at these conditions. condition value junction temperature 150 c storage temperature range ?5 c to +150 c voltage applied to any pad (v ss ?0.3 v) to (v cc + 0.3 v) voltage applied to any pad (input current limited to + 20 ma) (v ss ?1.0 v) to (v cc + 1.0 v) v cc - v ss ?0.3 v to + 7.0 v operating conditions (die) notes: 1. v cc = v cca = v ccd . 2. v ss = v ssa = v ssd . condition value commercial operating temperature range 0 c to +50 c supply voltage (v cc ) (1) +4.5 v to +6.5 v ground voltage (v ss ) (2) 0 v dc parameters (die) symbol parameters min (2) typ (1) max (2) units conditions v il input low voltage 0.8 v v ih input high voltage 2.0 v v ol output low voltage 0.4 v i ol = 4.0 ma v oh output high voltage v cc ?.4 v i oh = ?10 m a v oh1 o vf output high voltage 2.4 v i oh = ?1.6 ma v oh2 eom output high voltage v cc ?.0 v cc ?.8 v i oh = ?3.2 ma i cc v cc current (operating) 25 30 ma r ext = (3) i sb v cc current (standby) 1 10 m a (2) i il input leakage current + 1 m a i ilpd input current high w/pull down 130 m a force v cc (4) r ext output load impedance 16 w speaker load r mic preamp in input resistance 4 9 15 k w mic and mic ref pads r aux aux input resistance 5 11 20 k w r ana in ana in input resistance 2.3 3 5 k w * advance information: ISD2532/40/48/64 devices.
product data sheets isd2500 series 1?6 - 1 notes: 1. typical values @ t a = 25 c and 5.0 v. 2. all min/max limits are guaranteed by isd via electrical testing or characterization. not all specifications are 100% tested. 3. v cca and v ccd connected together. 4. xclk pad only. ac parameters (die) a pre1 preamp gain 1 21 24 26 db agc = 0.0 v a pre2 preamp gain 2 15 5 db agc = 2.5 v a aux aux in/sp+ gain 0.98 1.0 v/v a arp ana in to sp+/- gain 21 23 26 db r agc agc output resistance 2.5 5 9.5 k w symbol characteristic min (2) typ (1) max (2) units conditions f s sampling ? ISD2532* frequency ? isd2540* ? isd2548* ? isd2564* ?isd2560 ?isd2575 ?isd2590 ?isd25120 8.0 6.4 5.3 4.0 8.0 6.4 5.3 4.0 khz khz khz khz khz khz khz khz (7) (7) (7) (7) (7) (7) (7) (7) f cf filter pass band ? ISD2532* ? isd2540* ? isd2548* ? isd2564* ?isd2560 ?isd2575 ?isd2590 ?isd25120 3.4 2.7 2.3 1.7 3.4 2.7 2.3 1.7 khz khz khz khz khz khz khz khz 3 db roll-off point (3) (8) 3 db roll-off point (3) (8) 3 db roll-off point (3) (8) 3 db roll-off point (3) (8) 3 db roll-off point (3) (8) 3 db roll-off point (3) (8) 3 db roll-off point (3) (8) 3 db roll-off point (3) (8) t rec record ? ISD2532* duration ? isd2540* ? isd2548* ? isd2564* ?isd2560 ?isd2575 ?isd2590 ?isd25120 58.1 72.6 87.1 116.1 32.0 40.0 48.0 64.0 60.0 75.0 90.0 120.0 62.0 77.5 93.0 123.9 sec sec sec sec sec sec sec sec commercial operation commercial operation commercial operation commercial operation symbol parameters min (2) typ (1) max (2) units conditions dc parameters (die) ?continued * advance information: ISD2532/40/48/64 devices.
product data sheets isd2500 series 1?7 1 t play playback ? ISD2532* duration ? isd2540* ? isd2548* ? isd2564* ?isd2560 ?isd2575 ?isd2590 ?isd25120 58.1 72.6 87.1 116.1 32.0 40.0 48.0 64.0 60.0 75.0 90.0 120.0 62.0 77.5 93.0 123.9 sec sec sec sec sec sec sec sec (7) (7) (7) (7) commercial operation (7) commercial operation (7) commercial operation (7) commercial operation (7) t ce ce pulse width 100 nsec t set control/address setup time 300 nsec t hold control/address hold time 0 nsec t pud power-up delay ISD2532* ? isd2540* ? isd2548* ? isd2564* ?isd2560 ?isd2575 ?isd2590 ?isd25120 24.1 30.2 36.2 48.2 25.0 31.3 37.5 50.0 25.0 31.3 37.5 50.0 27.8 34.3 40.8 53.6 msec msec msec msec msec msec msec msec commercial operation commercial operation commercial operation commercial operation t pdr pd pulse ? ISD2532* width record ? isd2540* ? isd2548* ? isd2564* ?isd2560 ?isd2575 ?isd2590 ?isd25120 25 31.25 37.5 50.0 25 31.25 37.5 50.0 msec msec msec msec msec msec msec msec t pdp pd pulse ? ISD2532* width play isd2540* ? isd2548* ? isd2564* ?isd2560 ?isd2575 ?isd2590 ?isd25120 12.5 15.625 18.75 25.0 12.5 15.625 18.75 25.0 msec msec msec msec msec msec msec msec t pds pd pulse width static 100 nsec (6) t pdh power down hold 0 nsec symbol characteristic min (2) typ (1) max (2) units conditions ac parameters (die) ?continued * advance information: ISD2532/40/48/64 devices.
1?8 product data sheets isd2500 series - 1 notes: 1. typical values @ t a = 25 c and 5.0 v. 2. all min/max limits are guaranteed by isd via electrical testing or characterization. not all specifications are 100% tested. 3. low-frequency cutoff depends upon the value of external capacitors (see pin descriptions). 4. from aux in; if ana in is driven at 50 mv p-p, the p out =12.2 mw, typical. 5. with 5.1 k w series resistor at ana in. 6. t pds is required during a static condition, typically overflow. 7. sampling frequency and playback duration can vary as much as 2.25% over the commercial temperature range and voltage range. for greater stability, an external clock can be utilized (see pin descriptions). 8. filter specification applies to the antialiasing filter and the smoothing filter. t eom eom pulse width ? ISD2532* ? isd2540* ? isd2548* ? isd2564* ?isd2560 ?isd2575 ?isd2590 ?isd25120 12.5 15.625 18.75 25.0 12.5 15.625 18.75 25.0 msec msec msec msec msec msec msec msec t ovf over?w pulse width 6.5 m sec thd total harmonic distortion 1 3 % @ 1 khz p out speaker output power 12.2 50 mw r ext = 16 w (4) v out voltage across speaker pins 2.5 v p? r ext = 600 w v in1 mic input voltage 20 mv peak-to-peak (5) v in2 ana in input voltage 50 mv peak-to-peak v in3 aux input voltage 1.25 v peak-to-peak; r ext = 16 w symbol characteristic min (2) typ (1) max (2) units conditions ac parameters (die) ?continued * advance information: ISD2532/40/48/64 devices.
product data sheets isd2500 series 1?9 1 typical parameter variation with voltage and temperature (die) 02550 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 30 25 20 15 10 5 0 1.0 0.8 0.6 0.4 0.2 0 02550 02550 0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0 02550 6.5 volts 5.5 volts 4.5 volts operating current (ma) temperature (c) standby current ( m a) temperature (c) percent change (%) temperature (c) percent distortion (%) temperature (c) total harmonic distortion oscillator stability record mode operating current (i cc ) standby current (i sb ) * advance information: ISD2532/40/48/64 devices.
1?00 product data sheets isd2500 series - 1 ssd ssa a0 a1 a2 a3 a4 a5 a6 a7 (nc*) a8 (a7*) a9 (a8*) ce pd p/r eom ovf xclk v v v v sp+ sp? aux in ana in ana out mic ref ** mic agc ccd cca c 3 16 w speaker 1 2 3 4 5 6 7 8 9 10 23 24 27 25 22 26 28 16 12 13 14 15 11 20 21 18 17 19 electret microphone 0.1 m f cc v cc v 22 m f ss v playback/record power down chip enable isd2500 (pdip/soic) 0.1 m f 0.1 m f c 5 0.1 m f c 1 0.1 m f cc v c 2 4.7 m f 470 k w r 2 1 k w r 1 10 k w r 3 c 4 220 m f 100 k w r 4 c 6 c 7 c 8 5.1 k w r 6 10 k w r 5 isd2500 application example ?design schematic application example ?basic device control control step function action 1 power up chip and select record/playback mode 1. pd = low, 2. p/r = as desired 2 set message address for record/playback set addresses a0?9 3a begin playback p/r = high, ce = pulsed low 3b begin record p/r = low, ce = low 4a 4b end playback end record automatic pd or ce = high notes: * pin identifications for the ISD2532/40/48/64 devices which differ from those of the isd2560/75/90/120 devices are indicated. ** if desired, pin 18 (pdip package) may be left unconnected (microphone preamplifier noise will be higher). in this case, pin 18 must not be tied to any other signal or voltage. additional design example schematics are provided in the application notes and design manual in this book. * advance information: ISD2532/40/48/64 devices.
1?01 product data sheets isd2500 series 1 * advance information: ISD2532/40/48/64 devices. application example ?passive component functions part function comments r1 microphone power supply decoupling reduces power supply noise r2 release time constant sets release time for agc r3, r5 microphone biasing resistors provides biasing for microphone operation r4 series limiting resistor reduces level to prevent distortion at higher supply voltages. r6 series limiting resistor reduces level to high supply voltages c1, c5 microphone dc?locking capacitor low-frequency cutoff decouples microphone bias from chip. provides single- pole low-frequency cutoff and common mode noise rejection. c2 attack/release time constant sets attack/release time for agc c3 low-frequency cutoff capacitor provides additional pole for low-frequency cutoff c4 microphone power supply decoupling reduces power supply noise c6, c7, c8 power supply capacitors filter and bypass of power supply in this simplified block diagram of a microcontroller application, the push-button mode and message cueing are used. the microcontroller is a 16-pin version with enough port pins for buttons, an led, and the isd2500 series device. the software can be written to use three buttons: one each for play and record, and one for message selection. because the microcontroller is interpreting the but- tons and commanding the isd2500 device, software can be written for any functions desired in a particular application. note isd does not recomend connecting address lines directly to a microprocessor bus. address lines should be externally latched. explanation
1?02 product data sheets isd2500 series - 1 * advance information: ISD2532/40/48/64 devices. isd2500 application example ?microcontroller/isd2500 interface notes: * pin identifications for the ISD2532/40/48/64 devices which differ from those of the isd2560/75/90/120 devices are indicated. ssd ssa ccd cca a0 a1 a2 a3 a4 a5 a6 a7 (nc*) a8 (a7*) a9 (a8*) ce pd p/r eom ovf xclk 1 2 3 4 5 6 7 8 9 10 23 24 27 25 22 26 28 16 12 13 14 15 11 20 21 18 17 19 osc1 osc2 reset irq v v pb0 pb1 pa0 pa1 pa2 pa3 pa4 pa5 pa6 pa 7 isd2500 (pdip/soic) mc68hc705k1a u 1 d 1 run ss dd u 2 s2 msg # play s3 s1 record cc v r 1 tbd
product data sheets isd2500 series 1?03 1 * advance information: ISD2532/40/48/64 devices. application example ?push-button control control step function action 1 select record/playback mode p/r = as desired 2a 2b begin playback begin record p/r = high ce = pulsed low p/r = low ce = pulsed low 3 pause record or playback ce = pulsed low 4a 4b end payback end record automatic at eom marker or pd = pulsed high pd = pulsed high isd2500 application example ?push-button notes: * pin identifications for the ISD2532/40/48/64 devices which differ from those of the isd2560/75/90/120 devices are indicated. ** for more details, please refer to the isd application notes and design manual. ssd ssa a0 a1 a2 a3 a4 a5 a6 a7 (nc*) a8 (a7*) a9 (a8*) ce pd p/r eom ovf xclk v v v v sp+ sp? aux in ana in ana out mic ref mic agc ccd cca s1 r 7 c 3 16 w speaker 1 2 3 4 5 6 7 8 9 10 23 24 27 25 22 26 28 16 12 13 14 15 11 20 21 18 17 19 ls1 0.1 m f cc v cc v ss v 100 k w r 6 100 k w cc v start/pause s2 stop/reset playback/record cc v c5 22 m f c4 0.1 m f c1 0.1 m f isd2500 (pdip/soic) 5.1 k w r 4 r electret microphone c 5 0.1 m f c 1 0.1 m f cc v c 2 4.7 m f 470 k w r 2 10 k w r 3 c 4 220 m f 10 k w r 5
product data sheets isd2500 series 1?04 - 1 * advance information: ISD2532/40/48/64 devices. application example ?passive component functions push-button parameters part function comments r2 release time constant sets release time for agc r4 series limiting resistor reduces level to prevent distortion at higher supply voltages r6, r7 pull-up and pull-down resistors de?es static state of inputs c1, c4, c5 power supply capacitors filters and bypass of power supply c2 attack/release time constant sets attack/release time for agc c3 low-frequency cutoff capacitor provides additional pole for low- frequency cutoff symbol characteristic min typ (1) max units conditions t ce ce pulse width [start/pause] 300 nsec t set control/address setup time 300 nsec t pud power-up delay ISD2532* ? isd2540* ? isd2548* ? isd2564* ?isd2560 ?isd2575 ?isd2590 ?isd25120 25 31.25 37.25 50.0 25 31.25 37.25 50.0 msec msec msec msec msec msec msec msec t pd pd pulse width [stop/reset] 300 nsec t run ce to eom high 25 400 nsec t pause ce to eom low 50 400 nsec t db ce high ? ISD2532* debounce ? isd2540* ? isd2548* ? isd2564* ?isd2560 ?isd2575 ?isd2590 ?isd25120 70 85 105 135 70 85 105 135 105 135 160 215 105 135 160 215 msec msec msec msec msec msec msec msec
product data sheets isd2500 series 1?05 1 * advance information: ISD2532/40/48/64 devices. a0-a9 ce (start/pause) t pd pd (stop/reset) mic ana in ovf eom (run) t set t run t pud t set t set p/r t set t set t set t ce t pause t ce t ce t pud (1) (2) (3) (4, 5) t db t db (6, 7) (8) t db notes: "start" "pause" "stop" "start" a0-a9 ce (start/pause) t pd pd (stop/reset) sp+/ ovf eom (run) t set t run t set t set p/r t set t set t set t ce t pause t ce t ce t pud t pud (1) notes: (2) (3) (4, 5) t db t db (6, 7) (8) t db "start" "pause" "stop" "start" timing diagrams push-button mode record push-button mode playback notes: 1. a9, a8, and a6 = 1 for push-button operation. 2. the first ce low pulse performs a start function. 3. the part will begin to play or record after a power-up delay t pud . 4. the part must have ce high for a debounce period tdb before it will recognize another falling edge of ce and pause. 5. the second ce low pulse, and every even pulse thereafter, performs a pause function. 6. again, the part must have ce high for a debounce period tdb before it will recognize another falling edge of ce , which would restart an operation. in addition, the part will not do an internal power down until ce is high for the tdb time. 7. the third ce low pulse, and every odd pulse thereafter, performs a resume function. 8. at any time, a high level on pd will stop the current function, reset the address counter, and power down the device.
product data sheets isd2500 series 1?06 - 1 * advance information: ISD2532/40/48/64 devices. 2 = 2nd generation 5 = 5 volts duration: 32 = 32 seconds* 40 = 40 seconds* 48 = 48 seconds* 64 = 64 seconds* 60 = 60 seconds 75 = 75 seconds 90 = 90 seconds 120 = 120 seconds ordering information part number part number part number part number isd2560e isd2575e isd2590e isd25120p isd2560ei isd2575ei isd2590p isd25120x isd2560p isd2575p isd2590s isd2560pi isd2575pi isd2590t isd2560s isd2575s isd2590x isd2560si isd2575si isd2560t isd2575t isd2560ti isd2575ti isd2560x isd2575x isd25 _ _ _ _ special temperature field: blank = commercial packaged (0?c to +70?c) or commercial die (0?c to +50?c) i = industrial (-40?c to +85?c) package type: e = 28-lead 8x13.4-mm thin small outline package (tsop) p = 28-lead 0.600-inch plastic dual in-line package (pdip) s = 28-lead 0.300-inch small outline integrated circuit (soic) t = 32-lead 8x20-mm thin small outline package (tsop) x = die product number descriptor key when ordering isd2500 series devices, please refer to the following valid part numbers. for the latest product information, access isd? worldwide website at http://www.isd.com.

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